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The Reset input on a module accepts a trigger or gate signal, and tells the module to go back the beginning of whatever it was doing. In the case of a clock divider, this means pretend the next clock is the first clock you should be counting in the division (more on that below). In the case of a sequencer, it means go back to the first stage. In the case of an envelope, it means go back to the start of the attack. In the case of a gate delay, it means to re-start the timer for the delay.

There is an issue with clock dividers that are designed based on pure digital logic versus those designed specifically for musical applications. In the binary digital logic world, a reset means to set all the bits to 0. However, in the case of a clock divider, you want a reset to set all of the outputs at 1, so all of them would signal a downbeat on that clock – not a rest or silence. The EMW Logic 202 module I have is an example of a module that resets all of the divided clock outputs to 0; I need to feed the desired output to a logic inverter to get the “1” I want after a reset.

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